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New posts in x86

Hooks: why do we need to VirtualProtect() again to restore permissions?

c++ winapi x86 hook

Does the semantics of `std::memory_order_acquire` requires processor instructions on x86/x86_64?

c++ c++11 concurrency x86 memory-barriers

Optimal SSE unsigned 8 bit compare

c x86 sse simd sse4

Questions regarding operations on NaN

floating-point x86 sse nan ieee-754

Why segmentation cannot be completely disable?

x86 x86-64 cpu-architecture processor memory-segmentation

How to disable vectorization in clang++?

c++ optimization x86 clang vectorization

Order-preserving memcpy in C++

c++ x86 arm memcpy lock-free

What register in i386 stores the CPL?

x86 x86-64 cpu-architecture cpu-registers i386

Drain the instruction pipeline of Intel Core 2 Duo?

c assembly x86 benchmarking microbenchmark intel

Different platform AppDomains in one .Net process?

.net dll x86 64-bit appdomain

Emulating an x86 processor -- how should I start?

x86 emulation

what is the order of source operands in AT&T syntax compared to Intel syntax?

gcc assembly x86 att

Efficiently dividing a double by a power of 2

c++ c x86

EBP, ESP and stack frame in assembly

assembly x86 nasm calling-convention stack-frame

Can the IN (as well as INS, INSB, etc.) instruction block in x86 assembly?

assembly x86

Meaning of "ds:" in assembly language

assembly x86 intel

May there be any penalties when using 64/32-bit registers in Long mode?

assembly optimization x86 micro-optimization

Using OR r/m32, imm32 in NASM

assembly x86 intel amd

An i386/x64 pop FS/GS instruction supports a variant where it increments the SP by 32 bits or 64 bits in stead of 16 bits. What is it used for?

assembly x86 x86-64 i386

Is the i386 instruction "div ah" pointless?

assembly x86 i386
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