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New posts in micro-optimization

Which sequence of instructions has better performance for zeroing one register or another?

performance assembly mips cpu-architecture micro-optimization

When source registers in avx instruction can be reused

assembly cpu-architecture simd avx micro-optimization

Using Intrinsics to Extract And Shift Odd/Even Bits

c++ bit-manipulation intrinsics micro-optimization

Should I aggressively release memory while reading a file line by line in Perl?

perl memory-management micro-optimization

Long latency instruction

optimization x86 cpu-architecture micro-optimization microbenchmark

Why is this reordering of sub and mul instructions helpful?

c assembly gcc cpu-architecture micro-optimization

3D Morton code computation utilizing carry-less multiplication

algorithm assembly bit-manipulation riscv micro-optimization

x86 assembly - optimization of clamping rax to [ 0 .. limit )

assembly optimization x86 micro-optimization clamp

Why does some Windows booloader code zero registers with `sub` instead of `xor`?

assembly x86 micro-optimization zero-initialization

Does it make sense to use a relaxed load followed by a conditional fence, if I don't always need acquire semantics?

c++ multithreading atomic micro-optimization memory-barriers

How can I resolve data dependency in pointer arrays?

c++ performance compiler-optimization micro-optimization

Optimize lookup tables to simple ALU

c optimization clang code-generation micro-optimization

A checklist for Spacy optimization?

optimization nlp spacy micro-optimization

Why dependency in a loop iteration can't be executed together with the previous one

performance assembly x86 micro-optimization micro-architecture

Is it possible to make MSVC's __assume(0) aka std::unreachable() actually optimize?

c++ visual-c++ micro-optimization assumption

Why doesn’t Clang use vcnt for __builtin_popcountll on AArch32?

arm clang bit-manipulation micro-optimization neon
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