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New posts in avx

Intel vector instruction to zero-extend 8 4-bit values packed in a 32-bit int to a __m256i?

sse avx avx2

How to implement 16 and 32 bit integer insert and extract operations with AVX-512?

intrinsics avx avx512

how abundant is hardware support for FMA instruction set

x86 hardware sse simd avx

AVX equivalent for _mm_movelh_ps

c++ sse intrinsics avx

Add saturate 32-bit signed ints intrinsics?

x86 sse intrinsics avx saturation-arithmetic

Mixing SSE with AVX128 for shorter instructions?

assembly x86 sse avx micro-optimization

Is there a more efficient way to broadcast 4 contiguous doubles into 4 YMM registers?

gcc intel simd intrinsics avx

Best way to mask a single bit in AVX2?

c x86 simd avx avx2

Simple AVX512 dot-product loop only 10.6x faster, expected 16x

c++ performance avx dot-product avx512

AVX2: U8 absolute difference

sse simd neon avx avx2

How can I do efficiently bitwise majority voting on 3, 5, 7, 9 inputs with SSE/SSE2/AVX/...?

assembly sse avx neon avx512

avx three operands for sqrt?

assembly x86 simd instructions avx

Convention for displaying vector registers

x86 sse simd avx

How to further optimize matrix multiplication in llm.c project?

c optimization matrix-multiplication avx neon

SIMD: Bit-pack signed integers

sse simd avx avx2 avx512

Logical shift between YMM registers

assembly x86-64 avx avx2 avx512

Code alignment in one object file is affecting the performance of a function in another object file

c assembly x86 nasm avx

Rust target-cpu=native gets slower SIMD execution

rust simd intrinsics avx

Accumulating Doubles Into Bins via intrinsics

c++ simd avx avx2

AVX2: Is there a way to implement _mm256_mul_epi8 function for a constant power of 2?

c++ simd intrinsics avx avx2
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