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New posts in cpu-architecture
Why are set cache associativity in modern day processors 8-way set associative?
Aug 02, 2026
caching
intel
cpu-architecture
cpu-cache
amd-processor
ARMv8.3 meaning of rcpc
Aug 02, 2026
arm
cpu-architecture
memory-barriers
memory-model
armv8
How to handle branch mispredictions that seem to depend on machine code position?
Aug 02, 2026
c++
performance
benchmarking
cpu-architecture
branch-prediction
Do atomic operations require support from hardware?
Jul 31, 2026
c++
c
cpu-architecture
atomic
lock-free
Why is the adressspace increased from 32 to 36 bits with PAE
Jul 29, 2026
paging
cpu-architecture
x86
page-tables
volatile increments with false sharing run slower in release than in debug when 2 threads are sharing the same physical core
Jul 28, 2026
c++
performance
x86
cpu-architecture
false-sharing
Detecting Aligned Memory requirement on target CPU
Jul 29, 2026
c
cpu-architecture
memory-alignment
predefined-macro
Why doesn't bitwise NOT affect the ZF bit or any other FLAGS?
Jul 28, 2026
assembly
x86
cpu-architecture
eflags
What happens when the target CPU is "Any" and an assembly has two editions, x32 and x64?
Jul 27, 2026
.net
visual-studio
sqlite
.net-assembly
cpu-architecture
What is the difference between ABI and CPU architecture type?
Jul 28, 2026
android
cpu-architecture
abi
Cache line size
Jul 27, 2026
c++
performance
caching
benchmarking
cpu-architecture
What's the difference between a 'fast' (instruction) syscall and interrupt-driven system call?
Jul 25, 2026
assembly
x86
kernel
cpu-architecture
system-calls
What is the difference between Instruction Set and Instruction Set Architecture (ISA)?
Jul 25, 2026
assembly
computer-science
cpu-architecture
instruction-set
Question of Arm performance related to register allocation
Jul 23, 2026
performance
assembly
cpu-architecture
arm64
What is the rationale behind the CPU instruction set, in general and for x86's SETCC?
Jul 23, 2026
assembly
x86
cpu-architecture
instruction-set
instructions
Word Sizes and It's Indications
Jul 21, 2026
assembly
cpu-word
cpu-architecture
x86
Assembly - How to score a CPU instruction by latency and throughput
Jul 19, 2026
performance
assembly
x86
cpu-architecture
micro-optimization
Code and servers pitfalls to avoid when launching social application with many interactions?
Jul 19, 2026
database
amazon-web-services
performance
scale
cpu-architecture
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