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Using OR r/m32, imm32 in NASM

The opcode generated by:

or ebx, 0ffffffffh

with NASM is:

83CBFF

But in Intel Instructions Manual:

81 /1 id      OR r/m32, imm32
83 /1 ib      OR r/m32, imm8

My question is, why NASM used the opcode 83 instead of 81, and how to generate the opcode 81?

this is the command line for NASM: nasm -fwin32 file.asm -l list.lst

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Bite Bytes Avatar asked Jun 12 '17 17:06

Bite Bytes


1 Answers

NASM picks the 8-bit operand size as an optimization, because it does the same thing and takes less space. You can force NASM to use a specific operand size with:

or ebx, strict dword 0ffffffffh

This results in:

81 cb ff ff ff ff

Assembling the original code without optimizations (nasm -O0) will also give this result.

Note that if the register is EAX, doing this will result in the 0D opcode (mov eax, imm32) instead of 81. So in that case you might have to output the instruction yourself: db 0x81, 0xc8, 0xff, 0xff, 0xff, 0xff.

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interjay Avatar answered Oct 21 '22 18:10

interjay