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New posts in cpu-architecture
Does prefetching a write ever affect single core performance?
Oct 09, 2022
x86-64
multicore
cpu-architecture
prefetch
cpu-cache
Effective Address calculation time on 8086/8088
Sep 30, 2022
assembly
x86
x86-16
cpu-architecture
What is packed and unpacked and extended packed data
Feb 10, 2022
cpu-architecture
sse
simd
avx
avx2
MIX or MMIX - what is the best [closed]
Jul 27, 2022
assembly
cpu-architecture
taocp
mmix
The memory consistency model CUDA 4.0 and global memory?
Dec 14, 2016
memory
parallel-processing
cuda
cpu-architecture
Are correct branch predictions free?
Aug 19, 2022
cpu
cpu-architecture
What are shadow registers in MIPS and how are they used?
Aug 21, 2021
mips
cpu
cpu-registers
cpu-architecture
Is memory outside each core always conceptually flat/uniform/synchronous in a multiprocessor system?
Jun 01, 2022
memory
cpu-architecture
cpu-registers
cpu-cache
memory-barriers
Can the simple decoders in recent Intel microarchitectures handle all 1-µop instructions?
Apr 16, 2022
intel
x86
x86-64
cpu
cpu-architecture
Why does 20 address space with on a 16 bit machine give access to 1 Megabyte and not 2 Megabytes?
Apr 11, 2019
memory
cpu-architecture
x86-16
memory-address
processor
What does the processor do while waiting for a main memory fetch
Jun 04, 2016
cpu
cpu-architecture
cpu-cache
Updating page table when an entry is evicted from TLB
Mar 11, 2018
operating-system
cpu-architecture
virtual-memory
tlb
page-tables
Was there a P4 model with double-pumped 64-bit operations?
Apr 25, 2022
x86
x86-64
intel
cpu-architecture
Can a load or store be reordered before a conditional?
Jun 24, 2022
c++
concurrency
language-lawyer
cpu-architecture
lock-free
Do store instructions block subsequent instructions on a cache miss?
Nov 09, 2022
c++
concurrency
x86
cpu-architecture
cpu-cache
Does it cost significant resources for a modern CPU to keep flags updated?
May 22, 2022
performance
assembly
cpu-architecture
micro-optimization
eflags
Why is 1 Byte equal to 8 Bits? [closed]
Apr 07, 2020
byte
bit
cpu-architecture
Exactly how "fast" are modern CPUs?
Nov 15, 2022
intel
performance
assembly
x86
cpu-architecture
cpu-speed
Do all 64 bit intel architectures support SSSE3/SSE4.1/SSE4.2 instructions?
Sep 09, 2022
intel
x86-64
cpu-architecture
simd
Critical sections with multicore processors
Sep 07, 2022
multithreading
synchronization
cpu-architecture
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