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New posts in cpu-architecture

Turing machine vs Von Neuman machine

computer-science cpu-architecture turing-machines von-neumann

how much memory can be accessed by a 32 bit machine?

32bit-64bit ram cpu-architecture

After update to Xcode 5 - ld: symbol(s) not found for architecture armv7 or armv7s linker error

cordova static-libraries cpu-architecture ios7 xcode5

What is a cache hit and a cache miss? Why would context-switching cause cache miss?

concurrency language-agnostic cpu cpu-architecture cpu-cache

Why is the loop instruction slow? Couldn't Intel have implemented it efficiently?

performance assembly x86 intel cpu-architecture

Enhanced REP MOVSB for memcpy

performance assembly x86 cpu-architecture memcpy

How is CPU usage calculated?

algorithm performance cpu cpu-usage cpu-architecture

Line size of L1 and L2 caches

caching memory-management cpu-architecture cpu-cache

What are stalled-cycles-frontend and stalled-cycles-backend in 'perf stat' result?

linux performance optimization computer-architecture cpu-architecture

Detecting CPU architecture compile-time

c++ c detection cpu-architecture compile-time

Why is a conditional move not vulnerable for Branch Prediction Failure?

performance assembly optimization cpu-architecture branch-prediction

atomic operation cost

performance atomic cpu-architecture lock-free

Why does Intel hide internal RISC core in their processors?

assembly x86 intel cpu-architecture

Why is x86 ugly? Why is it considered inferior when compared to others? [closed]

assembly x86 mips x86-64 cpu-architecture

What's the difference between a word and byte?

assembly memory hardware terminology cpu-architecture

Why do x86-64 systems have only a 48 bit virtual address space?

x86-64 virtual-memory cpu-architecture

What is the "FS"/"GS" register intended for?

assembly x86 cpu-architecture cpu-registers memory-segmentation

Are there any smart cases of runtime code modification?

executable cpu-architecture instructions self-modifying platform-agnostic

Write-back vs Write-Through caching?

caching cpu-architecture cpu-cache

Bubble sort slower with -O3 than -O2 with GCC

c gcc x86-64 cpu-architecture compiler-optimization
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