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New posts in x86
Is performance reduced when executing loops whose uop count is not a multiple of processor width?
Sep 10, 2022
performance
assembly
x86
cpu-architecture
micro-optimization
x86 assembly abs() implementation?
Sep 06, 2022
assembly
x86
In what situation would the AVX2 gather instructions be faster than individually loading the data?
Sep 14, 2021
assembly
optimization
x86
vectorization
avx2
Why do virtual memory addresses for linux binaries start at 0x8048000?
Aug 30, 2022
linux
x86
elf
memory-layout
intel
Lost Cycles on Intel? An inconsistency between rdtsc and CPU_CLK_UNHALTED.REF_TSC
Aug 31, 2019
performance
x86
x86-64
cpu-architecture
rdtsc
Atomicity on x86
Sep 02, 2022
c++
multithreading
x86
atomic
memory-barriers
Can an x64 application use x86 assemblies - and vice versa?
Nov 10, 2022
.net
dll
x86
64-bit
x86-64
Intel x86 0x2E/0x3E Prefix Branch Prediction actually used?
Sep 15, 2022
gcc
x86
x86-64
branch-prediction
What does cltq do in assembly?
Sep 02, 2022
assembly
x86
gnu-assembler
att
What is the purpose of CS and IP registers in Intel 8086 assembly?
Sep 02, 2022
x86
intel
x86-16
assembly vim syntax highlighting
Feb 24, 2021
vim
assembly
x86
vim-syntax-highlighting
Can a bool read/write operation be not atomic on x86? [duplicate]
Sep 02, 2022
c++
x86
boolean
atomic
Does GCC generate suboptimal code for static branch prediction?
Aug 19, 2022
c
gcc
assembly
x86
branch-prediction
Why does breaking the "output dependency" of LZCNT matter?
Mar 16, 2022
performance
assembly
x86
cpu-architecture
micro-optimization
Difference in performance between MSVC and GCC for highly optimized matrix multplication code
Sep 24, 2022
c++
visual-c++
gcc
assembly
x86
What use is the INVD instruction?
Mar 04, 2022
assembly
x86
cpu-cache
What does Intel mean by "retired"?
Aug 21, 2021
performance
x86
x86-64
intel
Are different mmx, sse and avx versions complementary or supersets of each other?
Sep 02, 2022
x86
sse
avx
mmx
Some x86 ASM Reference/Tutorials? [closed]
Sep 22, 2022
reference
x86
assembly
SSE instructions: which CPUs can do atomic 16B memory operations?
Dec 16, 2021
concurrency
x86
thread-safety
atomic
sse
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