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New posts in simd
How to swap values with SIMD instructions?
Sep 01, 2026
x86
vectorization
simd
intrinsics
avx2
Clamp unsigned int to 0x10000 using SSE2
Aug 31, 2026
assembly
x86
simd
sse2
clamp
Why does gcc -O3 handle avx256 compare intrinsic differently than gcc -O0 and clang?
Aug 30, 2026
c
gcc
simd
intrinsics
avx
C++ SSE commands invert register values
Aug 27, 2026
c++
x86
sse
simd
x86 SIMD instructions 16 byte alignment in assembly (Without C intrinsics)
Aug 25, 2026
assembly
x86-64
sse
simd
memory-alignment
Idiomatic way to set simd lanes to 0 based on mask?
Aug 23, 2026
rust
simd
SIMD bit reordering of packed 12-bit integer array
Aug 22, 2026
c
simd
neon
avx2
pixelformat
Is the preference with SIMD to always get rid of branching?
Aug 20, 2026
c++
performance
optimization
concurrency
simd
Is there a way to shuffle a 8bitX32 ymm register right/left by N positions (c++)
Aug 18, 2026
c++
simd
clang++
avx2
SSE load/store memory transactions
Aug 16, 2026
c++
performance
sse
simd
Leveraging and optimizing SIMD for matrix axis looping in cython
Aug 13, 2026
cython
simd
avx
auto-vectorization
OpenMP 4 simd vectorization for c=c+a*b
Aug 13, 2026
c++
openmp
simd
Is `valarray` capable of harnessing SIMD support?
Aug 10, 2026
c++
vectorization
simd
intel-ipp
valarray
Alternative to immintrin.h [closed]
Aug 11, 2026
c
gcc
vectorization
simd
intrinsics
Give the CLANG compiler a loop length assertion
Aug 06, 2026
c++
visual-c++
clang
compiler-optimization
simd
When does data move around between SSE registers and the stack?
Aug 06, 2026
c++
sse
simd
cpu-registers
register-allocation
Why floating point registers are different than general purpose ones
Aug 05, 2026
floating-point
x86-64
simd
cpu-registers
How to load 16 x 8 bit integer using SSE2
Jul 31, 2026
x86
sse
simd
sse2
How to correctly use std::arch::_mm_loadu_si128 / _mm_storeu_si128
Jul 30, 2026
rust
undefined-behavior
simd
memory-alignment
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