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New posts in x86

How to set gcc to use intel syntax permanently?

gcc assembly x86 inline-assembly intel-syntax

x86-64: canonical addresses and actual available range

assembly x86 x86-64 virtual-address-space address-space

PERF STAT does not count memory-loads but counts memory-stores

linux x86 intel perf

What is the function of a "data label" in an x86 assembler?

assembly x86 masm

NASM and 8-bit memory offset confusion

assembly x86 mov

Shapes in the Mandelbrot Set

assembly x86 floating-point rounding mandelbrot

Is processor can do memory and arithmetic operation at the same time?

assembly x86 cpu-architecture

Get an arbitrary float from a simd register at runtime?

x86 sse simd avx avx2

Does memory fencing blocks threads in multi-core CPUs?

multithreading x86 cpu-architecture multicore memory-barriers

Is it possible for the RESOURCE_STALLS.RS event to occur even when the RS is not completely full?

performance x86 intel cpu-architecture intel-pmu

How to create a UEFI kernel in NASM on Linux

x86 kernel qemu osdev uefi

What is the difference between _mm_movehdup_ps and _mm_shuffle_ps in this case?

x86 sse intrinsics micro-optimization sse3

Can different processes run RDTSC at the same time?

x86 intel multicore hyperthreading rdtsc

Is it possible to call a relative address with each instruction at most 3 bytes long, in 32-bit mode?

assembly x86 nasm machine-code

Cannot call real mode C function from bootloader (NASM + GCC toolchain)

gcc assembly x86 bootloader osdev

Is there any way to write for Intel CPU direct core-to-core communication code?

assembly x86 cpu intel cpu-architecture

gcc flags to disable arithmetic optimisations

c gcc x86 compiler-optimization microbenchmark

Why using AVX ymm(m256) instructions is ~4 times slower than xmm(m128)

assembly x86 sse avx amd-processor

What is the point of SSE2 instructions such as orpd?

assembly x86 sse instruction-set sse2

Why isn't my code working when adding .386?

assembly x86 32-bit tasm real-mode intel
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