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New posts in x86

How to map the section to the segment from an ELF output file?

intel gcc assembly x86 elf osdev

What is practical application of x86 RCL/RCR instructions?

intel assembly x86 bit-manipulation x86-64 bit-shift

What is a processor hint?

intel assembly x86 instructions

Can the simple decoders in recent Intel microarchitectures handle all 1-µop instructions?

intel x86 x86-64 cpu cpu-architecture

Does cmpxchg write destination cache line on failure? If not, is it better than xchg for spinlock?

intel assembly x86 cpu-cache micro-optimization compare-and-swap

How to achieve the effect of vpmovmskb on ZMM registers?

intel assembly x86 bitmask avx512

Placing an instruction in the address pointed by the reset vector using times and align NASM directives

intel assembly x86 nasm osdev

Access to PIT (?) IO ports 44h and 46h - what do those ports do?

intel assembly x86 dos x86-16 ioports

Task management on x86

intel linux assembly process operating-system x86

how does cpu calculate 20-bit address in real mode

intel x86 memory-address real-mode

Packed and encrypted section in x86 reversing challenge, without tripping entropy heuristics

intel windows encryption assembly x86 reverse-engineering

Intel x86 32-bit register confusion

intel assembly x86 nasm cpu-registers 32-bit

Most efficient way to convert vector of uint32 to vector of float?

intel assembly floating-point x86 sse

How to display a number on the screen and and sleep for one second with DOS x86 assembly?

assembly x86 dos nasm bios

Emulating Intel TSX instructions

assembly x86 emulation intel-tsx

Convert binary to arm

architecture binary x86 arm

What nonlocal effects can change the performance of a basic block?

optimization assembly compilation x86 micro-optimization

JavaFX exe bundling for x86 windows systems

deployment x86 java-7 32-bit

Exactly how "fast" are modern CPUs?

intel performance assembly x86 cpu-architecture cpu-speed

MUL function in assembly

intel assembly x86 x86-16 multiplication
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