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Printing signed integer value stored in a variable of type reg

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verilog

xilinx

How do I print a signed integer value stored in an 8-bit register declared as:

reg [7:0] acc;

Using:

$display("acc : %d", acc)

It prints the unsigned value.

What's the correct syntax for the $display function?

like image 958
Nullpoet Avatar asked Feb 17 '12 07:02

Nullpoet


Video Answer


1 Answers

If you declare the reg as signed, $display will show the minus sign:

module tb;

reg signed [7:0] acc;

initial begin
    acc = 8'hf0;
    $display("acc : %d", acc);
end

endmodule

Prints out:

acc :         -16
like image 128
toolic Avatar answered Sep 25 '22 08:09

toolic