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Parameter warning: truncated value with size 32 to match size of target

Tags:

verilog

I have a parameter as follows:

parameter PARAM = 7'd69;

When I try to assign that value to the register below:

reg [6:0] r;

Like this:

r <= PARAM;

I get synthesis warnings:

Warning (10230): ... truncated value with size 32 to match size of target (7)

This I assume is because PARAM is being interpreted as an integer because it is defined as a parameter. Is there any way to define PARAM as 7 bits wide?

I could always pass this in as a 7-bit input to my module, but I was wondering if there is a more elegant solution.

like image 932
DevGoldm Avatar asked Aug 21 '13 16:08

DevGoldm


1 Answers

You can define parameter as follow:

parameter [6:0]PARAM = 7'd69;

That way you're telling your compiler that PARAM size is 7 bits.

like image 123
Qiu Avatar answered Nov 15 '22 08:11

Qiu