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New posts in x86
Are different mmx, sse and avx versions complementary or supersets of each other?
Sep 02, 2022
x86
sse
avx
mmx
Some x86 ASM Reference/Tutorials? [closed]
Sep 22, 2022
reference
x86
assembly
SSE instructions: which CPUs can do atomic 16B memory operations?
Dec 16, 2021
concurrency
x86
thread-safety
atomic
sse
What's missing/sub-optimal in this memcpy implementation?
Nov 13, 2022
c
optimization
x86
simd
avx
Do Intel and AMD processor have the same assembler?
Sep 02, 2022
c
x86
intel
compatibility
amd-processor
What are near, far and huge pointers?
Sep 02, 2022
c++
c
pointers
x86
x86-16
Reading program counter directly
Aug 16, 2022
assembly
x86
program-counter
Does my AMD-based machine use little endian or big endian?
Sep 01, 2022
c
x86
intel
endianness
amd-processor
Base pointer and stack pointer
Aug 29, 2022
assembly
x86
nasm
stack-pointer
Developing an operating system for the x86 architecture [closed]
Sep 01, 2022
operating-system
x86
osdev
What is the 0x10 in the "leal 0x10(%ebx), %eax" x86 assembly instruction?
Sep 01, 2022
assembly
x86
instructions
How to: pow(real, real) in x86
Sep 12, 2022
x86
assembly
pow
Is there a way to get gcc to output raw binary?
Sep 01, 2022
linux
gcc
command-line
linker
x86
x86_64 ASM - maximum bytes for an instruction?
Aug 18, 2022
c
assembly
x86
64-bit
x86-64
Order of local variable allocation on the stack
Sep 01, 2022
c
memory
gcc
x86
stack
x86 LOCK question on multi-core CPUs
Apr 20, 2016
assembly
locking
x86
cpu
multicore
Basic use of immediates vs. square brackets in YASM/NASM x86 assembly
Oct 18, 2022
assembly
x86
nasm
memory-address
yasm
What causes page faults?
Sep 01, 2022
windows
x86
paging
x86-64
Why is floor() so slow?
Sep 01, 2022
c
performance
visual-c++
x86
intel
What is the use of "push %ebp; movl %esp, %ebp" generated by GCC for x86?
Sep 01, 2022
gcc
assembly
x86
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