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New posts in assembly
Bitwise operation on a floating point usefulness
Jan 11, 2023
assembly
x86
floating-point
bit-manipulation
bitwise-operators
Print string using INT 0x10 in bootsector
Jan 11, 2023
assembly
x86
fasm
Same operations taking different time
Jan 10, 2023
c++
assembly
ARM assembly branch to address inside register or memory
Jan 09, 2023
assembly
arm
Why isn't movl from memory to memory allowed?
Jan 08, 2023
assembly
x86
cpu-architecture
instruction-set
Writing memory with assembly (Z80 / Gameboy)
Jan 09, 2023
assembly
z80
gameboy
OS/X 64-bit assembly code generates bus error
Jan 08, 2023
macos
assembly
nasm
x86-64
bus-error
Can two instructions execute in the same cycle if the same register is used as input and output respectively?
Jan 08, 2023
assembly
x86
x86-64
cpu-architecture
micro-optimization
8086 random number generator (not just using the system time)?
Jan 07, 2023
assembly
random
x86
x86-16
emu8086
Mixing syscall write with printf on linux
Jan 07, 2023
c
linux
assembly
printf
x86-64
Copying data from one variable to another
Jan 05, 2023
assembly
x86
nasm
Is it possible to dereference something inside of a dereference in assembly?
Jan 05, 2023
assembly
x86
masm
dereference
Displaying numbers with DOS
Jan 05, 2023
assembly
dos
x86-16
integer-division
signed-integer
Instruction reordering in x86 / x64 asm - performance optimisation with latest CPUs
Jan 04, 2023
assembly
optimization
x86
x86-64
micro-optimization
Unknown meaning of colon ( : ) in assembly instruction
Jan 05, 2023
assembly
x86
x86-64
disassembly
GCC inline assembly with stack operation
Jan 05, 2023
assembly
gcc
x86
inline-assembly
stack-memory
Confusion about load word (lw) vs load address(la) and offsets in mips assembly?
Jan 05, 2023
assembly
mips
Can I get a int from my EAX/RAX to a register of the FPU like st0?
Jan 05, 2023
assembly
x86
nasm
fpu
Is a mov to a segmentation register slower than a mov to a general purpose register?
Jan 04, 2023
assembly
x86
cpu-architecture
memory-segmentation
cpu-cycles
How to use XACQUIRE, XRELEASE Hardware Lock Elision (HLE) prefix hints?
Jan 04, 2023
assembly
x86
x86-64
intel
cpu-architecture
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