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New posts in x86
Coding in x86 - compiler code generation
Nov 06, 2019
compiler-construction
x86
Could someone explain about large fs:0?
Oct 14, 2020
exception
assembly
x86
guard
disassembly
Is it possible to assign parts of the shared L2 caches to different cores
Feb 18, 2022
c
linux
x86
multicore
Optimize socket data transfer over loopback wrt NUMA
May 22, 2022
linux-kernel
x86
x86-64
dma
numa
Best way to compute max mask of sse var
Aug 14, 2020
c++
assembly
x86
bit-manipulation
sse
c inline assembly loading a register value to esp register
Sep 05, 2022
c
pointers
x86
cygwin
inline-assembly
How can you calculate a factor if you have the other factor and the product with overflows?
Jul 09, 2022
c++
c
x86
dword
how is CPU physical address space mapped to physical DRAM?
Nov 11, 2021
memory
x86
cpu-architecture
memory-address
mmu
Why modifying an instruction cause huge i-cache and i-TLB misses on x86?
Jun 07, 2022
performance
x86
x86-64
performancecounter
perf
When does stack grow? How does OS know when to grow stack?
Aug 24, 2022
c
assembly
memory
x86
abi
How can I transpose an image in Assembly?
May 07, 2022
image-processing
assembly
x86
masm
Using LLDT and configuring the GDT for it
Jun 09, 2019
assembly
x86
nasm
osdev
Ignoring a system call
Sep 23, 2022
c
linux
gcc
x86
ptrace
Reference for x86 instructions by functionality
Oct 21, 2020
assembly
x86
instruction-set
Cannot access memory as SSE type on x86 but works fine on x64
Jan 16, 2021
c++
x86
sse
How to call cpuid instruction in a Mac framework?
Aug 18, 2018
xcode
macos
assembly
x86
cpuid
How to compile Android AOSP for x86
Dec 06, 2018
android
x86
android-source
How can I exchange the middle two 64 bits in a 256 bit AVX(YMM) register
Dec 19, 2017
x86
simd
avx
x86 hardware Interrupt is not working on qemu
Aug 18, 2019
c
x86
kernel
qemu
Is placing code and read-only data it uses right next to each other a good idea?
Aug 20, 2022
performance
assembly
optimization
x86
lookup-tables
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