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New posts in x86

Good reference for x86 assembly instructions [closed]

assembly x86

Access x86 COM from x64 .NET

.net com interop x86 64-bit x86-64 32bit-64bit

Observing stale instruction fetching on x86 with self-modifying code

c caching x86 self-modifying

Assembly 'call' vs 'jmp'

assembly x86 subroutine

difference in mfence and asm volatile ("" : : : "memory")

gcc x86 memory-barriers

Why doesn't GCC use partial registers?

assembly gcc x86 x86-64 cpu-architecture

Does Linux use x86 CPU's PCID feature for TLB? If not, why?

caching assembly linux-kernel operating-system x86

Does a memory barrier ensure that the cache coherence has been completed?

assembly x86 operating-system cpu-cache memory-barriers

Why can't you set the instruction pointer directly?

x86 cpu-registers program-counter

Benefits of x87 over SSE

x86 x86-64 sse fpu x87

Why There is a difference between assembly languages like Windows, Linux?

assembly operating-system x86

What do square brackets mean in x86 assembly?

assembly memory x86 intel-syntax

ENTER and LEAVE in Assembly?

assembly x86 stack-frame

The meaning of RET 2 in assembly

assembly x86

Unexpectedly poor and weirdly bimodal performance for store loop on Intel Skylake

performance assembly optimization x86 x86-64

What does the `test` instruction do? [duplicate]

assembly x86

Do function pointers force an instruction pipeline to clear?

c performance x86 function-pointers pipeline

Branch alignment for loops involving micro-coded instructions on Intel SnB-family CPUs

performance assembly x86 intel micro-optimization

bootloader - switching processor to protected mode

assembly operating-system x86 bootloader protected-mode

Which is a better write barrier on x86: lock+addl or xchgl?

assembly x86 memory-barriers
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