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New posts in cpu-architecture
About Adaptive Mode for L1 Cache in Hyper-threading
Jun 27, 2018
performance
intel
cpu-architecture
cpu-cache
hyperthreading
Out-of-order instruction execution: is commit order preserved?
May 15, 2022
cpu
cpu-architecture
instructions
pipelining
dynamic-execution
How to tell length of an x86-64 instruction opcode using CPU itself?
Aug 22, 2022
x86
x86-64
cpu-architecture
opcode
micro-architecture
How do Intel CPUs that use the ring bus topology decode and handle port I/O operations
Apr 12, 2021
io
x86
intel
hardware
cpu-architecture
Where does the scheduler run?
May 12, 2022
scheduler
cpu-architecture
The inner workings of Spectre (v2)
Aug 20, 2022
x86
intel
cpu-architecture
branch-prediction
spectre
Why doesn't Ice Lake have MOVDIRx like tremont? Do they already have better ones?
Jun 01, 2022
assembly
x86
intel
cpu-architecture
instruction-set
Assembly why is "lea eax, [eax + eax*const]; shl eax, eax, const;" combined faster than "imul eax, eax, const" according to gcc -O2?
May 15, 2022
c
assembly
optimization
x86-64
cpu-architecture
Why is my C++ app faster than my C app (using the same library) on a Core i7
Nov 05, 2022
c++
c
hardware
cpu
cpu-architecture
How does the branch predictor know if it is not correct?
Oct 20, 2022
assembly
cpu
cpu-architecture
branch-prediction
Using System.getProperty("os.arch") to check if it is armeabi cpu
May 27, 2022
android
cpu-architecture
ARM Cortex-M exception entry and stack framing
Nov 09, 2022
exception-handling
arm
cpu-architecture
cortex-m
LFENCE is really useless vs. Spectre #2?
Jul 11, 2021
assembly
memory
x86
x86-64
cpu-architecture
What are function epilogues and prologues?
May 02, 2019
assembly
compiler-construction
terminology
cpu-architecture
calling-convention
Advantages of a 64 bit system
Aug 23, 2022
c++
performance
architecture
64-bit
cpu-architecture
Lightweight method to use Amd64 instructions under 32-bit Windows?
Feb 03, 2022
cpu-architecture
win32-process
x86-64
How does 32-bit address 4GB if 2³² bits = 4 Billion bits not Bytes?
Apr 30, 2022
cpu-architecture
memory-address
addressing
x86-64 usage of LFENCE
Dec 23, 2021
assembly
x86-64
cpu-architecture
atomic
Who Decides Between I/O Mapped and Memory Mapped I/O (x86)
Jun 26, 2022
assembly
x86
cpu-architecture
Why are there so many CPU architectures: x86, x64, x87, etc...?
Feb 22, 2022
cpu-architecture
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