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New posts in assembly
How to implement vectorize "exp" and "log" base-2 functions using AVX-512
Mar 27, 2026
assembly
simd
logarithm
avx512
exp
Why do the addresses in my assembler dump differ from the addresses of registers?
Mar 26, 2026
gcc
assembly
x86
gdb
Get byte representation of ASM instruction within C code
Mar 26, 2026
c
assembly
machine-code
powerpc
How assemblers translate labels to addresses
Mar 28, 2026
assembly
label
Why does 2's complement sign extension work by adding copies of the sign bit?
Mar 26, 2026
assembly
binary
bit-manipulation
twos-complement
sign-extension
Why doesn't my register contain the value I calculate from the asm
Mar 26, 2026
c++
assembly
gdb
x86-64
How can I multiply two 64-bit numbers using x86 assembly language?
Mar 27, 2026
assembly
x86
bigint
extended-precision
Int 10H not working in QEMU
Mar 24, 2026
assembly
x86
qemu
bootloader
bios
What is the joke behind "goto $"?
Mar 25, 2026
assembly
Assembly infinite loop (jmp -2)
Mar 27, 2026
assembly
nasm
infinite-loop
Binary Bomb phase 3 stuck
Mar 26, 2026
assembly
x86
gdb
reverse-engineering
CS: override on access to global variables in IDA output, like mov eax, cs:x?
Mar 25, 2026
assembly
x86-64
disassembly
ida
addressing-mode
Moving a label into 64bit register - inline assembly (GCC / CLANG)
Mar 25, 2026
gcc
assembly
inline-assembly
Trying to call C function from glibc from Assembly program (64 bit)
Mar 26, 2026
c
linux
assembly
nasm
32bit-64bit
MARS MIPS assembler gives error: Extended (pseudo) instruction or format not permitted
Mar 25, 2026
assembly
mips
mars-simulator
How do I write an expression that deference a pointer in GDB?
Mar 24, 2026
c++
assembly
x86
gdb
gnu
MSVC C++ compiler giving inconsistent performance on different builds of the same code when using [[unlikely/likely]] attributes [duplicate]
Mar 25, 2026
c++
performance
assembly
x86
micro-optimization
What is the CPUID standard function 01H?
Mar 25, 2026
c
assembly
x86
cpu-registers
cpuid
Looking for mmap flag values
Mar 24, 2026
c
assembly
x86-64
system-calls
mmap
Must all 16 bytes of an x86 MASKMOVDQU instruction be valid memory?
Mar 24, 2026
assembly
x86
alignment
sse
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