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New posts in assembly

What is the reason function names are prefixed with an underscore by the compiler?

c function assembly naming compilation

Why are rbp and rsp called general purpose registers?

assembly x86-64 cpu-registers

Is it possible to create threads without system calls in Linux x86 GAS assembly?

linux multithreading assembly gnu-assembler

What does NOPL do in x86 system?

assembly x86 nop

Long multi-byte NOPs: commonly understood macros or other notation

assembly x86-64 naming-conventions disassembly nop no-op

Why does mulss take only 3 cycles on Haswell, different from Agner's instruction tables? (Unrolling FP loops with multiple accumulators)

c assembly x86 sse micro-optimization

Is it safe to read past the end of a buffer within the same page on x86 and x64?

c performance assembly optimization x86

Learning to read GCC assembler output

c++ c gcc assembly

In x86 what's difference between "test eax,eax" and "cmp eax,0"

assembly x86

Efficient 128-bit addition using carry flag

c++ gcc assembly bigint carryflag

Difference between JA and JG in assembly

assembly x86 conditional-statements

What's the point of LEA EAX, [EAX]?

c assembly x86 instruction-set

How exactly do partial registers on Haswell/Skylake perform? Writing AL seems to have a false dependency on RAX, and AH is inconsistent

assembly x86 intel cpu-architecture micro-optimization

What is callq instruction?

assembly x86 x86-64 att

Reading a register value into a C variable [duplicate]

c gcc assembly inline-assembly cpu-registers

How are the fs/gs registers used in Linux AMD64?

linux assembly architecture x86 x86-64

What does the MOVZBL instruction do in IA-32 AT&T syntax?

assembly x86 att zero-extension

Labels in GCC inline assembly

c++ c gcc assembly inline-assembly

Why is such complex code emitted for dividing a signed integer by a power of two?

c++ visual-c++ assembly x86 division

Why does Intel's compiler prefer NEG+ADD over SUB?

assembly x86 micro-optimization icc
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