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New posts in intel

Why does the ia32/x64 opcode map document 0x66 and 0xF2 as a double mandatory prefix for opcode 0x0F38F1 (CRC32)?

intel assembly x86 x86-64 opcode machine-code

Calling a function that can be either cdecl or stdcall

intel assembly x86 calling-convention stdcall cdecl

possible to do if (!boolvar) { ... in 1 asm instruction?

intel c assembly x86

Does tbb::concurrent_unordered_map::unsafe_erase invalidate any existing iterators?

intel c++ concurrency thread-safety hashmap tbb

x86 dirty bit in page table entry

intel memory x86 paging dirty-data

Assembly x86 video mode

intel video assembly x86 nasm vga

Android Emulator Doesn't Use HAXM

intel android launch haxm

Linux x86_64 assembly socket programming

intel c linux sockets assembly x86-64

Can I print the gdtr and gdt descriptor under gdb?

intel assembly linux-kernel x86 gdb gdt

Assembly - inline asm - copy from one array to another?

intel linux assembly x86-64 cpu-registers att

Xcode 6 Error - "Missing Required Architecture i386" When Building for iOS Simulator

intel ios architecture frameworks xcode6 i386

MOVUPD vs. MOVDQU (x86/x64 assembly)

intel assembly x86 64-bit

Assembled c++ appears to contain superfluous instructions

c++ macos assembly optimization x86 intel

How can I simplify code generation at runtime?

c++ windows visual-c++ assembly x86 intel

Why Linux/gnu linker chose address 0x400000?

linux x86 x86-64 ld elf intel

assembly to compare two numbers

intel assembly x86 compare machine-code

Why does returning a floating-point value change its value?

intel c++ c floating-point x86

Performance implications of context switches for 64-bit segment bases

intel c linux performance x86-64 cpu-registers

Why would one use "movl $1, %eax" as opposed to, say, "movb $1, %eax"

intel assembly x86

x86 Assembly on a Mac

xcode macos x86 assembly intel
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