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I only know instructions like je, jnl, etc., in x86 AT&T syntax.
What does jcc actually mean? All jump instructions?
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Below is the full 8086/8088 instruction set of Intel (81 instructions total). Most if not all of these instructions are available in 32-bit mode; they just operate on 32-bit registers (eax, ebx, etc.)
mov — Move (Opcodes: 88, 89, 8A, 8B, 8C, 8E, ...) The mov instruction copies the data item referred to by its second operand (i.e. register contents, memory contents, or a constant value) into the location referred to by its first operand (i.e. a register or memory).
In the x86 assembly language, the JMP instruction performs an unconditional jump. Such an instruction transfers the flow of execution by changing the program counter.
cc stands for condition code.
Jcc is not a single instruction, it just describes the jump mnemonics that check the condition code before jumping.
JNE for instance, checks the condition code before jumping.
The typical case is to do a comparison (which sets the CC) and then use one of the jump mnemonics afterwards.
The condition code can also be set with instructions like AND, OR, XOR, addition, subtraction (or CMP, of course).
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CC means condition code. Normally this means the state of FLAGS, except for JECXZ, which Intel groups with the other Jcc instructions in the Jcc insn set ref manual entry.
Other manuals, like Agner Fog's instruction tables, often separate JECXZ from the flag-based jumps, because they perform differently.
All jump instructions?
No, definitely not.
x86 also has another conditional jump instruction: LOOP/LOOPcc. LOOPE LOOPNE are the only conditions available, not the full set of flag states. (Don't use LOOP, it's slow)
Jcc also doesn't include JMP or any other unconditional jumps, even indirect jumps (e.g. jmp *rax in AT&T syntax). Indirect jumps are always taken, but can have a variable destination. CALL and RET are also jumps.
Even XBEGIN operates as a jump if a transactional memory operation aborts before reaching an XEND instruction, so it's a conditional branch on the transaction committing or aborting.
There are other "cc" instruction that use the same FLAGS conditions as conditional jumps: SETcc and CMOVcc. Just like Jcc, FLAGS are a data input to those instructions, and their data output depends on it. So you can do flag-based stuff without jumps.
The terminology isn't restricted to just x86:
GNU C inline assembly syntax also uses "cc" to declare that an inline-asm statement clobbers the machine's condition codes. (This is implicit on x86 and x86-64: you never need an explicit "cc" clobber. Unlike some architectures (e.g. ARM), most x86 instructions modify flags, so when gcc was ported to x86, the designers decided that it was unlikely to help make better code, and much more likely to be a source of bugs when people forgot to write "cc" in the clobber section.)
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