x86 128-bit atomic ops

Question

How would you achieve 128-bit atomic operations in x86?

Intel's System Programming Guide, Part 1, 8.1 Locked Atomic Operations specifies guaranteed 16-, 32-, and 64-bit atomic operations. So, can you achieve 128-bit atomic operations by doing 2 64-bit ops with the LOCK prefix? Something like...

LOCK mov 64bits->addr
LOCK mov 64bits->addr+64bits

Aparently SSE has 128-bit XMM registers. Can you just do 128-bit compare-and-swap using these registers?

Answer 1

The LOCK Prefix can not be used in combination with MOV instruction.

The LOCK prefix can be prepended only to the following instructions and only to those forms of the instructions where the destination operand is a memory operand: ADD, ADC, AND, BTC, BTR, BTS, CMPXCHG, CMPXCH8B, DEC, INC, NEG, NOT, OR, SBB, SUB, XOR, XADD, and XCHG. Intel Instruction Set Reference

Doing so will generate an Invalid Opcode Exception. So LOCK CMPXCHG16B is the only way here.