I have been looking at some Verilog testbench code that heavily uses $readmemh
and $writememh
.
I have a vague understanding that these functions basically read to and write from memory. What is their specific function and how do they work?
Verilog HDL contains the $readmemb or $readmemh system tasks to do the file read if the file data is formatted in a specific way using either binary or hexadecimal data. TestBench is like just an interface between external vector source and DUT. Sometimes outputs are also to written to external files.
$readmemh is not synthesizeable. It is used for simulation or behavioural code only.
I agree its not too easy to find something about readmem/writemem. You can find a little bit here: https://www.fullchipdesign.com/readmemh.htm
Anyway there is not too much to say about these functions, the syntax is:
$readmem[hb]("File", ArrayName, StartAddr, EndAddr)
$writemem[hb]("File", ArrayName, StartAddr, EndAddr)
Verilog is very picky about the file format, the number of bit in the text file have to match the number of bits in the array.
I recommend you play around a little bit by defining an array, filling it up with data write it out with writememh/writememb and print it out afterwards.
Something like this should get you started (not tried out!).
integer i;
reg [7:0] memory [0:15]; // 8 bit memory with 16 entries
initial begin
for (i=0; i<16; i++) begin
memory[i] = i;
end
$writememb("memory_binary.txt", memory);
$writememh("memory_hex.txt", memory);
end
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