What is parasitic state machine in Johnson counter

Question

module johnson #(parameter N=8)
  (output logic [N-1:0] q, input logic clk,reset);

  always_ff @(posedge clk,posedge reset)
    if(reset)
      q<=0;
    else
      q<={~q[0],q[N-1:1]};

endmodule

Above is the systemverilog HDL for an 8-bit Johnson counter. I read from a textbook that it has large number of unused states that form a counter of their own i.e a parasitic state machine. What exactly is this parasitic state machine?

Answer 1

The problem here is that if this circuit ended up entering one of the unused states for some reason you would be stuck in a loop then never returns to one of the used states. This counter has the following states:

00000000
10000000
11000000
11100000
11110000
...
00001111
00000111
00000011
00000001

If a cosmic ray hits your chip and flips one of the bits then you could end up with states that don't exist in normal operation:

00010000
10001000
11000100
11100010
11110001
01111000
10111100
....

The only way to get back to normal is by asserting reset. You have two options to deal with this: either add a bunch of logic to detect the situation, or assume that a bit randomly flipping isn't going to happen. I would say that you don't need to worry about it unless that flipped bit is going to launch a missile.