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New posts in x86-64

assembly subroutines get called twice without even being called from main

intel linux gcc assembly x86-64 subroutine

ranlib and static library

intel c linux gcc makefile x86-64

Why does the ia32/x64 opcode map document 0x66 and 0xF2 as a double mandatory prefix for opcode 0x0F38F1 (CRC32)?

intel assembly x86 x86-64 opcode machine-code

Linux x86_64 assembly socket programming

intel c linux sockets assembly x86-64

Assembly - inline asm - copy from one array to another?

intel linux assembly x86-64 cpu-registers att

Can I use some bits of pointer (x86_64) for custom data? And how if possible?

intel pointers x86-64

How to get this simple assembly to run?

intel macos assembly linker x86-64 nasm

error in backend: 32-bit absolute addressing is not supported in 64-bit mode

intel macos assembly x86-64 intel-syntax

find address of PLT stub

intel linux x86-64 elf plt got

Is the stack frame required for all functions in C on x86-64?

intel c assembly x86 stack x86-64

Is the Microsoft Stack always aligned to 16-bytes?

intel windows assembly stack x86-64 calling-convention

What is practical application of x86 RCL/RCR instructions?

intel assembly x86 bit-manipulation x86-64 bit-shift

Can the simple decoders in recent Intel microarchitectures handle all 1-µop instructions?

intel x86 x86-64 cpu cpu-architecture

Why would one use "ret" instead of "call" to call a method?

intel assembly x86-64 osdev spectre

Why doesn't the same generated assembler code lead to the same output?

intel c floating-point x86-64 floating-accuracy icc

Self-modifying code sees a 0xCC byte but the debugger doesn't show it?

assembly gdb x86-64 breakpoints self-modifying intel

g++ Optimization Flags: -fuse-linker-plugin vs -fwhole-program

intel c++ linux g++ x86-64 ld

How come INC instruction of x86 is not atomic? [duplicate]

intel c assembly x86-64 atomic

Performance implications of context switches for 64-bit segment bases

intel c linux performance x86-64 cpu-registers

Do all 64 bit intel architectures support SSSE3/SSE4.1/SSE4.2 instructions?

intel x86-64 cpu-architecture simd
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