I'm wondering how I can avoid some echo in a Makefile :
clean: rm -fr *.o
this rule will print:
$>make clean rm -fr *.o $>
How can I avoid that?
If you want to inhibit the display of commands during a particular make run, you can use the -s option. If you want to inhibit the display of all command lines in every run, add the special target . SILENT to your makefile . and there is no file named xyz , make halts after rm returns its exit status.
It allows you to type 'make clean' at the command line to get rid of your object and executable files. Sometimes the compiler will link or compile files incorrectly and the only way to get a fresh start is to remove all the object and executable files.
A simple makefile consists of “rules” with the following shape: target … : prerequisites … recipe … … A target is usually the name of a file that is generated by a program; examples of targets are executable or object files. A target can also be the name of an action to carry out, such as ' clean ' (see Phony Targets).
To start with: the actual command must be on the next line (or at least that is the case with GNU Make, it might be different with other Make's - I'm not sure of that)
clean: rm -rf *.o
(note, you need a TAB before rm -rf *.o
as in every rule)
Making it silent can be done by prefixing a @
:
so your makefile becomes
clean: @rm -rf *.o
If there are no *.o
files to delete, you might still end up with an error message. To suppress these, add the following
clean: -@rm -rf *.o 2>/dev/null || true
2>/dev/null
pipes any error message to /dev/null - so you won't see any errors-
in front of the command makes sure that make
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