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Making make print commands before executing when NOT using CMake

Tags:

makefile

I see that this is the same question as

Making cmake print commands before executing

But that answer doesn't work for me. I'm guessing that answer only works with cmake. What options work without cmake?

Note tried these

make VERBOSE=1 target
make target VERBOSE=1
VERBOSE=1 make target
make V=1 target
make target V=1
V=1 make target
make -V target
make -v target

none of them worked.

make -v returns

GNU Make 3.81
Copyright (C) 2006  Free Software Foundation, Inc.
This is free software; see the source for copying conditions.
There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A
PARTICULAR PURPOSE.

This program built for x86_64-pc-linux-gnu
like image 688
gman Avatar asked Jun 12 '12 20:06

gman


3 Answers

By default, make does print every command before executing it. This printing can be suppressed by one of the following mechanisms:

  • on a case-by-case basis, by adding @ at the beginning of the command
  • globally, by adding the .SILENT built-in target.
  • somewhere along the make process, by invoking sub-make(s) with one of the flags -s, --silent or --quiet, as in $(MAKE) --silent -C someDir, for example. From that moment on, command echoing is suppressed in the sub-make.

If your makefile does not print the commands, then it is probably using one of these three mechanisms, and you have to actually inspect the makefile(s) to figure out which.

As a workaround to avoid these echo-suppressing mechanisms, you could re-define the shell to be used to use a debug mode, for example like make SHELL="/bin/bash -x" target. Other shells have similar options. With that approach, it is not make printing the commands, but the shell itself.

If you use the flag -n or --just-print, the echo-suppressing mechanisms will be ignored and you will always see all commands that make thinks should be executed -- but they are not actually executed, just printed. That might be a good way to figure out what you can actually expect to see.

The VERBOSE variable has no standard meaning for make, but only if your makefile interprets it.

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Reinier Torenbeek Avatar answered Oct 23 '22 10:10

Reinier Torenbeek


For my version of make, I found BOTH paramters -n and -d helped.

GNU Make 3.80 Copyright (C) 2002 Free Software Foundation, Inc

  -d                          Print lots of debugging information.
  -n, --just-print, --dry-run, --recon
                              Don't actually run any commands; just print them.

When a bunch of makefile fragments are included, the line numbers don't make sense without this key debug flag.

CreateProcess(....exe,...)
Reading makefile `../../../../build/Makefile.options' (search path) (don't care) (no ~ expansion)...
Makefile:361: Extraneous text after `else' directive
Makefile:368: Extraneous text after `else' directive
Makefile:368: *** only one `else' per conditional.  Stop.
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Kevin Avatar answered Oct 23 '22 11:10

Kevin


I think this is what you want: make MAKE_VERBOSE=1 target

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user2023183 Avatar answered Oct 23 '22 10:10

user2023183