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I think this is a question that has been asked many times but I cannot find the right way to do it.
I have the following structure:
project/ project/Makefile project/code project/code/*.cc project/code/Makefile When I am in the directory 'project/code' and call "make project_code" my code is compiling correctly.
I would like to do that when I am in 'project/', just calling "make project_code" as if I was in 'project/code'.
The makefile 'project/Makefile' will contain other rules (such as 'install') and some rules to compile as if I was in 'project/code'. And for that, I am requesting your help... Thanks.
824
# Register all subdirectories in the project's root directory. SUBDIRS := $(wildcard */.) # Recurse `make` into each subdirectory. $(SUBDIRS): FORCE $(MAKE) -C $@ # A target without prerequisites and a recipe, and there is no file named `FORCE`.
some projects put their makefile in src/ subdirectory of the root directories of the projects, some projects put their makefiles in the root directory of the project.
$@ is the name of the target being generated, and $< the first prerequisite (usually a source file). You can find a list of all these special variables in the GNU Make manual.
Recursive use of make means using make as a command in a makefile. This technique is useful when you want separate makefiles for various subsystems that compose a larger system.
The simplest way is to do:
CODE_DIR = code .PHONY: project_code project_code: $(MAKE) -C $(CODE_DIR) The .PHONY rule means that project_code is not a file that needs to be built, and the -C flag indicates a change in directory (equivalent to running cd code before calling make). You can use the same approach for calling other targets in the code Makefile.
For example:
clean: $(MAKE) -C $(CODE_DIR) clean If you love us? You can donate to us via Paypal or buy me a coffee so we can maintain and grow! Thank you!
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