Program counter holds the address of the instruction that should be executed next, while instruction register holds the actual instruction to be executed. wouldn't one of them be enough?
And what is the length of each one of these registers?
Thanks.
The Program Counter, also known as the Instruction pointer, is a processor register that indicates the current address of the program being executed. To access this content, you must purchase a Community Membership, Community Membership for Teams, Educational Membership or Educational Membership for Teams.
In computing, the instruction register (IR) or current instruction register (CIR) is the part of a CPU's control unit that holds the instruction currently being executed or decoded.
What it means is that there are no instructions by which the programmer can load it with values of his choice. For example, instructions like 'MOV IR, D' or 'MVI IR, 45H' are not present in the instruction set of 8085. Thus, IR register is not shown in the programmer's view of 8085. Let us consider one example.
The steps of a machine cycle are: Fetch – The control unit requests instructions from the main memory that is stored at a memory's location as indicated by the program counter (also known as the instruction counter). Decode – Received instructions are decoded in the instruction register.
Program counter holds the address of the instruction that should be executed next, while instruction register holds the actual instruction to be executed. wouldn't one of them be enough? And what is the length of each one of these registers? Thanks. cpu-registerscpu-architectureprogram-counter Share Improve this question Follow
A program counter (PC) is a CPU register in the computer processor which has the address of the next instruction to be executed from memory. It is a digital counter needed for faster execution of tasks as well as for tracking the current execution point.
The PC can be accessed/modified by jump and branch instructions. Therefore, the destination address can be loaded to the program counter via branch instructions. The program counter can also be loaded with the address using the data processing instructions.
It can be modified or accessed with the help of access or jump instructions. The PC can be accessed/modified by jump and branch instructions. Therefore, the destination address can be loaded to the program counter via branch instructions. The program counter can also be loaded with the address using the data processing instructions.
You will need both always. The program counter (PC) holds the address of the next instruction to be executed, while the instruction register (IR) holds the encoded instruction. Upon fetching the instruction, the program counter is incremented by one "address value" (to the location of the next instruction). The instruction is then decoded and executed appropriately.
The reason why you need both is because if you only had a program counter and used it for both purposes you would get the following troublesome system:
[Beginning of program execution]
Therefore, we need another register to hold the actual instruction fetched from memory. Once we fetch that memory, we increase PC so that we know where to fetch the next instruction.
P.S. the width of the registers varies depending on the architecture's word size. For example, for a 32-bit processor, the word size is 32-bits. Therefore, the registers on the CPU would be 32 bits. Instruction registers are no different in dimensions. The difference is in the behavior and interpretation. Instructions are encoded in various forms, however, they still occupy a 32-bit register. For example, the Nios II processor from Altera contains 3 different instruction types, each encoded differently. See page 6 of ftp://ftp.altera.com/up/pub/Tutorials/DE2/Computer_Organization/tut_nios2_introduction.pdf
You can learn more about the Nios II processor's structure from the link above as well. It is a simple IP CPU. Of course Intel has their own specification/design and it will vary.
As you stated, the Program Counter (PC) holds the address of the next instruction to execute, and the Instruction Register (IR) stores the actual instruction to be executed (but not its address).
Related to the lenght of these registers, current machines have 64-bit PCs. The length of the IR (from a logical point of view) depends on the architecture:
As these machines are able to fetch, decode and execute several instructions every cycle, the physical implementation of the IR is not easy to describe in a few lines.
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