Is it necessary to register both inputs and outputs of every hardware core?

Question

I am aware of the need to synchronize all inputs to an FPGA before using those inputs in order to avoid metastability. I'm also aware of the need to synchronize signals that cross clock domains within a single FPGA. This question isn't about crossing clock domains.

My question is whether it is a good idea to routinely register all of the inputs and outputs of every internal hardware module in an FPGA design. The rationale is that we want to break up long chains of combinational logic in order to improve the clock rate so that we can meet the timing constraints for a chosen clock rate. This will add additional cycles of latency proportional to the number of modules that a signal must cross. Is this a good idea or a bad idea? Should one register only inputs and not outputs?

Answer Summary

Rule of thumb: register all outputs of internal FPGA cores; no need to register inputs. If an output already comes from a register, such as the state register of a state machine, then there is no need to register again.

Answer 1

It is difficult to give a hard and fast rule. It really depends on many factors.

It could:

• Increase Fmax by breaking up combinatorial paths
• Make place and route easier by allowing the tools to spread logic out in the part
• Make partitioning your design easier, allowing for partial rebuilds.

It will not magically solve critical path timing issues. If there is a critical path inside one of your major "blocks", then it will still remain your critical path.

Additionally, you may encounter more problems, depending on how full your design is on the target part.

These things said, I lean to the side of registering outputs only.

Answer 2

Registering all of the inputs and outputs of every internal hardware module in an FPGA design is a bit of overkill. If an output register feeds an input register with no logic between them, then 2x the required registers are consumed. Unless, of course, you're doing logic path balancing.

Registering only inputs and not outputs of every internal hardware module in an FPGA design is a conservative design approach. If the design meets its performance and resource utilization requirements, then this is a valid approach.

If the design is not meeting its performance/utilization requirements, then you've got to do the extra timing analysis in order to reduce the registers in a given logic path within the FPGA.