How do I compile Forth code for the J1 CPU? [closed]

Question

I am interested in using the J1 CPU in an FPGA project.

I understand that to use the J1 CPU itself, I need to synthesise (etc.) the Verilog code, and load the bitstream into my FPGA. I can do this using IceStorm, or the FPGA vendor's own tools. No problems.

I don't understand how to compile a Forth program which can be uploaded to the FPGA's memory and executed.

What command do I run to compile a Forth program into a .hex file?

Answer 1

I am aware of SwapForth, which I believe is a Forth interpreter which runs on the J1 CPU itself

You are wrong here. SwapForth is an interactive compiler, not the interpreter.

Maybe it does more than you need - handling dictionaries, accepting new code from the UART (after all, it's a complete Forth system), which you might not need at all, but that doesn't make it an interpreter.

To compile your own code, run gforth cross.fs basewords.fs your_prog.fs. Note that cross.fs is quite minimalistic, and doesn't even provide variable/value words. But you can easily add those (and many more) directly to cross.fs.

Answer 2

Please,take a look at the github repository with swapforth. It contains complete implementations for FPGA like J1A and J1B.

With J1B I have even created a complete system for initialization and diagnostics of a relatively complex FPGA-based board - AFCK_J1B_FORTH.

To compile the code with new words, I use the Verilator emulation of J1B. So you do not need the real J1B in hardware to prepare the code. The whole process is also described in the README of AFCK_J1B_FORTH.