Add library to Vivado 2014.4

Question

I am quite new to Vivado and VHDL and I would like some guidance on a fundamental issue.

I am guessing that I can create my own libraries and use them in my projects as i do with the default and fundamental ones

eg:

library IEEE;
use IEEE.std_logic_1164.ALL;
use IEEE.std_logic_unsigned.ALL;

Now, by browsing on the net, I haven't found anything concrete as an answer, there is not any direct way to "add library" (at least in my version of Vivado).

Is there any way to build VHDL code with lets say type definitions and use them in any file you like, as it is done in C for example?

Answer 1

So libraries are just a method for dealing some name clashes. So Xilinx (or another vendor) can release a new entity and not have it clash with your existing objects. You can certainly do that as well, but it doesn't actually solve any problems for you.

Instead, what you are looking for is a package. Let's look at how we would use it:

Let's create another file tools.vhd

package tools is
    type tribool is (true, false, maybe);
end package;

Which we could then use in our entities as:

use work.tools.all;
...
signal x : tribool := maybe;