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Many SSE "mov" instructions specify that they are moving floating-point values. For example:
Why don't these instructions simply say that they move 32-bit or 64-bit values? If they're just moving bits around, why do the instructions specify that they are for floating-point values? Surely they would work whether you interpret those bits as floating-point or not?
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The floating point unit (FPU) was a separate chip through the 80386+80387. It is now located on-chip, but the programming model still requires most data to be transferred through memory, not between FPU and general purpose registers.
The floating-point register is used to execute the instruction. There are thirty-two 64-bit floating-point registers, numbered from floating-point register 0-31. All floating-point instructions provide a 5-bit field that specifies which floating-point registers to use in the execution of the instruction.
I think I've found the answer: some microarchitectures execute floating-point instructions on different execution units than integer instructions. You get better overall latency when a stream of instructions stays within the same "domain" (integer or floating point). This is covered in pretty good detail in Agner Fog's optimization manual, in the section titled "Data Bypass Delays": http://www.agner.org/optimize/microarchitecture.pdf
I found this explanation in this similar SO question: Difference between MOVDQA and MOVAPS x86 instructions?
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