On Linux system, what is the difference between Interrupt Vector Table (IVT) and Interrupt Descriptor Table (IDT) ?
The Interrupt Descriptor Table (IDT) is a data structure used by the x86 architecture to implement an interrupt vector table. The IDT is used by the processor to determine the correct response to interrupts and exceptions.
The Interrupt Descriptor Table (IDT) is a binary data structure specific to the IA-32 and x86-64 architectures. It is the Protected Mode and Long Mode counterpart to the Real Mode Interrupt Vector Table (IVT) telling the CPU where the Interrupt Service Routines (ISR) are located (one per interrupt vector).
An interrupt vector table (IVT) is a data structure that associates a list of interrupt handlers with a list of interrupt requests in a table of interrupt vectors. Each entry of the interrupt vector table, called an interrupt vector, is the address of an interrupt handler.
The interrupt descriptor table (IDT) associates each interrupt or exception identifier with a descriptor for the instructions that service the associated event. Like the GDT and LDTs, the IDT is an array of 8-byte descriptors. Unlike the GDT and LDTs, the first entry of the IDT may contain a descriptor.
Interrupt Processing in Real Mode In real mode, the lower 1K of memory holds a data structure known as the Interrupt Vector Table (IVT). There are nominally 256 entries in this table. (Since the 80286, the IVT is not required to have 256 entries or start at physical address 0. The base and address and length of the IVT are determined by looking at the I**nterrupt Descriptor Table Register**.) Each entry contains a far pointer to an Interrupt Service Routine. Any type of interrupt routes to the appropriate Interrupt Service Routine through this table. The processor indexes the interrupt number in this table; pushes current CS, IP, and flags on the stack; and calls the far pointer specified in the IVT. The handler processes the interrupt and then executes an IRET instruction to return control to the place where the processor executed at the time of the interrupt.
Interrupt Processing in Protected Mode In protected mode, interrupts are handled in a similar way as real mode. The Interrupt Descriptor Table (IDT) does what the IVT does in real mode. IDT consists of an array of 8-byte segment descriptors called gates. The Interrupt Descriptor Table Register (IDTR) holds the base address and the limit of IDT. The IDT must exist in physical memory and should never swap out to virtual memory. This is because if an interrupt were to occur while the IDT were swapped out, the processor would generate an exception, requiring the IDT to get the handler for handling this exception, and so on until the system crashed. The gates in the IDT can consist of three types: interrupt gates, trap gates, and task gates. We won�t dwell on the details of the trap and task gates. For further information, refer to Intel processor documentation.
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