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What happens to interrupts that are sent to the processor after i use cli command and before i use sti to enable them again?
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x86 interrupts Interrupts are events from devices to the CPU signalizing that device has something to tell, like user input on the keyboard or network packet arrival. Without interrupts you should’ve been polling all your peripherals, thus wasting CPU time, introducing latency and being a horrible person.
When an interrupt occurs, it causes the CPU to stop executing the current program. The control then passes to a special piece of code called an Interrupt Handler or Interrupt Service Routine. The interrupt handler will process the interrupt and resume the interrupted program. But have you ever wondered how the initial program is resumed?
When an interrupt occurs, it causes the CPU to stop executing the current program. The control then passes to a special piece of code called an Interrupt Handler or Interrupt Service Routine. The interrupt handler will process the interrupt and resume the interrupted program.
There are two hardware interrupts in the 8086 microprocessor. They are: NMI (Non-Maskable Interrupt): It is a single pin non-maskable hardware interrupt that cannot be disabled. It is the highest priority interrupt in the 8086 microprocessor. After its execution, this interrupt generates a TYPE 2 interrupt.
As several people in your comments have said, interrupts do not get lost.
The interrupt that has happened between the CLI and STI
gets serviced as soon as you re-enable the interrupts using the STI instruction.
To understand the behaviour, you must know, how interrupts are delivered to the processor. To quote Intel Developer Manual:
Asserting the INTR pin signals the processor that an external interrupt has occurred. The processor reads from the system bus the interrupt vector number provided by an external interrupt controller, such as an 8259A
The key is that INTR pin is asserted by the 8259A PIC until you, in
the interrupt service routine, acknowladge the interrupt. Thus, when you disable interrupts, you are just instructing the processor to ignore the INTR pin.
When you re-enable the interrupts, you stop ignoring the INTR pin and
processor starts handling the interrupt right away.
Disclaimer: this is a legacy behaviour, but sufficient for explanation.
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