FabienM

FabienM has asked 9 questions and find answers to 17 problems.

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About

I'm an electronic engineer, specialised in FPGA. I work in Armadeus Systems. Armadeus Systems design system-on-module with ARM processor (i.MX) and fpga (Spartan3, Spartan6, cycloneV).

FabienM questions

How to instanciate Xilinx differential clock buffer with chisel3 blackboxes?
How to initialize a Reg of Bundle in Chisel?
Is there a simple example of how to generate verilog from Chisel3 module?

FabienM answers

chisel asynch fifo / multiple clocks.
passing arguments to verilator backend in chisel
How to initialize the vector in chisel
xil_printf and XUartLite_SendByte
RISCV: how the branch intstructions are calculated?
Setting the mstatus register for RISC-V
PCIe Driver - How does user space access it?
Learning Chisel -- advanced examples to understand Rocket Chip code
RISC-V difference between jal and jalr
How to share memory between user space and kernel using mmap and the data is not backed by a file