Setting the mstatus register for RISC-V

Question

I am trying to load mstatus with another register t1.

 lw t1, mstatus              # load mstatys register into t1
 xori t1, t1, 0x8            # xor mstatus to set 3rd bit and leave everything else as is
 lw mstatus, t1              # set mstatus 

The initial lw t1, mstatus works just fine. However when trying to lw mstatus, t1 the assembler gives

Error: illegal operands 'lw mstatus, t1'

I have no idea what causes this error, mstatus register is a read/write register. It should work.

Answer 1

mstatus is not a memory part. Then it can't be loaded/stored with lw/sw instructions under general purpose registers (x1-x31).

mstatus is part of CSR (Configuration Status Registers) that been accessed with Control and Status Register Instruction (see chapter 2.8 of riscv-spec).

Then to load mstatus you should use csrrs/c instruction and to write csrrw instruction depending of what you want to do you can also just clear/set individual bit of register.

Write t1 in mstatus and don't care of mstatus old value (x0):

csrrw t1, mstatus, x0

Read mstatus in t1 and don't touch mstatus value:

csrrs x0, mstatus, t1

or

csrrc x0, mstatus, t1