Pipelining in assembly

Question

How many stalls do I need to execute the following instructions properly. I am a little confused with what I did, so I am here to see experts answers.

lw $1,0($2);

beq $1,$2,Label;

Note that the check whether the branch will occur or not will be done in decoding stage. But the source register rs of beq which is $1 in this case will be updated after writeback stage of lw instruction. So do we need to forward new data from Memory in memory stage to Decoding stage of beq instruction.

Stage go like this:

IF: Instruction fetching; ID: Instruction Decoding Ex: Execution/ALU stage MEM: reading data from memory WB: storing data in destination register

This is what I have done so far.

When lw is in exec stage and beq in decoding stage, stalling condition becomes true and a bubble is created. Now lw is in Mem stage and beq is still in decoding stage due to bubble, again the stalling condition has become true and second stall has occured.and now lw is in WB (write back) and beq is in decoding stage but still the value of $1 will update at the end of WB stage which eventually means beq will still work with wrong value of $1.

Answer 1

looks like you will need a third stall to allow the register to be written back to the register file before decoding, or forward the data from the write-back stage to the decode stage. Either way this should be executed if the register to be written is equal to rs.

You seem to need too many stalls because the branch is detected early in the decode stage, which is good, because it saves fetching unnecessary instructions that will be flushed anyway, but you must have proper hazard detection to go with that.