After the kernel loads a native userland Linux application on first entry the x86-64 CPU registers are mostly zero, apart from the RSP and RIP which have their usual meanings, the registers CS SS and R11 are non-zero:
cs 0x33 51
ss 0x2b 43
r11 0x200 512
It was my understanding that the CS and SS registers are unused on x86-64 as in long mode we have a flat 64-bit address model.
Do the CS and SS registers mean anything from/to the kernel? Is userland expected to simply leave them alone?
Also does the initial 512 value in the R11 mean anything?
In 64-bit mode the segment registers still point to IDT or GDT entries. However the IDT/GDT entries only contain limited information:
Data segment selectors (valid for DS, ES, SS, FS and GS) only contain a single bit: The "P" bit indicating that the segment is present. This only makes sense for segments loaded into the FS and GS registers.
Code segment selectors (valid for CS) contain access right information and the long mode bit indicating that 64-bit mode is active when CS points to such a segment.
The segment base and segment length are not present.
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