Left Shift Overflow on 68k/x86?

Question

I heard that the Motorola 68000 and Intel x86 architectures handle overflow from left shifting differently. Specifically the 68k LSL vs. the Intel SAL/SHL assembly instructions.

Does anyone know the specifics of this? Do they set different flags, or set them differently? I tried to look this up in the reference manuals, but I don't see any difference. Why would one want to handle this situation differently?

Answer 1

The X bit is not involved. The confusion over the 68000 flags arises because there are two left shift instructions:

• LSL, logical shift left, clears the overflow flag.
• ASL, Arithmetic shift left, sets the V flag if the MSB changes sign at any time during the shift.

The x86 instruction set is not nearly as powerful. If the shift count = 1 then OF, the overflow flag, = (MSB XOR CF), i.e. if the MSB changed sign as a result of the 1-bit shift, OF = 1, else OF = 0.

If the shift count is >1 then OF is undefined. (HTML extract of Intel's documentation for SHL).