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New posts in x86

x86 assembly instruction: call *Reg

assembly x86 call

logical shift right on signed data

c++ c x86 bit-manipulation bit-shift

Is it useful to use VZEROUPPER if your program+libraries contain no SSE instructions?

performance assembly x86 avx micro-optimization

What is the Linux process kernel stack state at process creation?

linux x86 stack kernel state intel

why X86 provides pair of division and multiply instructions?

c x86

Difference between PREFETCH and PREFETCHNTA instructions

assembly x86 cpu-cache prefetch instruction-set

How can I write a "Hello World" app in assembly language? [duplicate]

assembly x86 x86-64

Is it okay to mix legacy SSE encoded instructions and VEX encoded ones in the same code path?

assembly x86 sse avx intel

GetThreadID in assembly

delphi x86 inline-assembly fastmm intel

Make gcc use conditional moves

c gcc optimization x86

Where is VPERMB in AVX2?

assembly x86 intel sse avx2

how to interpret perf iTLB-loads,iTLB-load-misses

x86 intel cpu-architecture perf tlb

How to shutdown the machine? I'm building a tiny OS of my own [duplicate]

assembly operating-system x86 shutdown system-shutdown

Is there something wrong with my spin lock?

linux assembly linux-kernel x86 kernel

How to write to screen with video memory address 0xb8000 from real mode?

assembly x86 nasm bare-metal real-mode

Can x86 reorder a narrow store with a wider load that fully contains it?

multithreading assembly x86 locking x86-64

Debugging disassembled libraries with gdb

assembly x86 gdb disassembly

fastest way to write a bitstream on modern x86 hardware

c++ optimization x86 bit-manipulation

What is a Partial Flag Stall?

assembly x86 intel cpu-architecture

When using a mask register with AVX-512 load and stores, is a fault raised for invalid accesses to masked out elements?

x86 avx avx512
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