Questions
Linux
Laravel
Mysql
Ubuntu
Git
Menu
HTML
CSS
JAVASCRIPT
SQL
PYTHON
PHP
BOOTSTRAP
JAVA
JQUERY
R
React
Kotlin
×
Linux
Laravel
Mysql
Ubuntu
Git
New posts in x86
How to perform atomic 64b read on x86 (Pentium and above)?
Sep 24, 2026
c++
winapi
x86
multicore
atomic
Booting a non-multiboot kernel with GRUB2 [closed]
Sep 24, 2026
x86
osdev
grub
Why if check is not being optimized
Sep 23, 2026
c++
gcc
assembly
optimization
x86
Error code A4011 multiple .MODEL directives, but I only have one in my code
Sep 22, 2026
assembly
x86
masm
visual-studio-2022
irvine32
How should I improve the performance of this C++ code?
Sep 23, 2026
c++
optimization
x86
sse
simd
Why is pointer arithmetic inconsistent across architectures?
Sep 21, 2026
c
pointers
x86
arm
byte
linux assembly "collect2: ld returned 1 exit status"
Sep 21, 2026
linux
gcc
assembly
x86
linker-errors
CPU cache inhibition
Sep 22, 2026
c
linux
multithreading
x86
cpu-cache
How does OS detect a crash of a process
Sep 22, 2026
c++
x86
crash
osdev
Why are ebx, esi and edi unusable when operating with a stackframe?
Sep 21, 2026
assembly
x86
calling-convention
stack-frame
load overflow topmost address on x86
Sep 21, 2026
x86
operating-system
kernel
cpu-architecture
processor
x86 sub instruction opcode confusion [duplicate]
Sep 20, 2026
assembly
x86
tasm
opcode
instruction-encoding
Unmanaged x64 assemblies in mixed .NET development environment
Sep 19, 2026
.net
visual-studio
x86
64-bit
MASM doesn't insert x87 WAIT prefixes with some combinations of CPU and FPU directives
Sep 20, 2026
assembly
x86
masm
masm32
x87
What's the purpose of _dl_sysinfo_int80?
Sep 19, 2026
c
gcc
assembly
x86
When using the MOV mnemonic to load/copy a string to a memory register in MASM, are the characters stored in reverse order?
Sep 18, 2026
string
assembly
x86
masm
masm32
How to correctly determine -march and -mtune for Intel processors?
Sep 19, 2026
performance
gcc
x86
intel
compiler-optimization
How can a extend memory space at 8086 up to 1 GB?
Sep 18, 2026
memory
x86
x86-16
SYSRET vs SYSRETQ distinction and compatibility mode
Sep 17, 2026
assembly
x86
x86-64
intel
cpu-architecture
Older Entries »