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New posts in x86
SIMD : registers changing value during execution
Nov 29, 2025
c++
x86
simd
intrinsics
avx2
Creating a FAT partition with a bootsector as an MBR
Nov 28, 2025
assembly
x86
osdev
fat
mbr
intVal3 TBYTE 1234 -- invalid TBYTE variable declaration gone unnoticed by assembler
Nov 29, 2025
assembly
x86
masm
Real mode Interrupt handling routine not working as expected
Nov 28, 2025
assembly
x86
virtualbox
nasm
interrupt-handling
Looking for tutorial resources on basic, non-macro assembly language [closed]
Nov 29, 2025
assembly
x86
x86-64
What is the gcc cpu-type that includes support for RDTSCP?
Nov 28, 2025
gcc
x86
intel
rdtsc
Reverse engineer array dimensions / struct layout from compiler asm output?
Nov 28, 2025
c
assembly
x86
reverse-engineering
Do modern computers boot in real mode or virtual real mode?
Nov 28, 2025
x86
kernel
bootloader
osdev
multiboot
Lightweight x86 Emulator for .NET / Executing x86 code in a managed environment
Nov 27, 2025
.net
x86
native
managed
emulation
What does LEA do internally?
Nov 27, 2025
assembly
x86
How to correctly measure IPC (Instructions per cycle) with perf
Nov 27, 2025
x86
performancecounter
perf
papi
How to catch a tab press in x86 assembly?
Nov 24, 2025
assembly
x86
dos
masm
Googleplay don‘t filter x86 device
Nov 24, 2025
android
android-ndk
x86
google-play
native
NASM: parser: instruction expected rep movs
Nov 25, 2025
assembly
x86
nasm
MASM (8086) assembly language line continuation
Nov 25, 2025
assembly
x86
masm
x86-16
How do I use microprogramming to modify the instruction set architecture of an Intel CPU?
Nov 24, 2025
x86
intel
cpu-architecture
microcoding
How does CPU perform operation that manipulate data that's less than a word size
Nov 24, 2025
assembly
x86
cpu
cpu-architecture
hardware
What does NASM's resb do in binary output format?
Nov 23, 2025
assembly
x86
nasm
x86-16
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