Logo Questions Linux Laravel Mysql Ubuntu Git Menu
HTML CSS JAVASCRIPT SQL PYTHON PHP BOOTSTRAP JAVA JQUERY R React Kotlin
 

New posts in cpu-architecture

Total Store Order and write merging in x86(-64)

architecture x86 x86-64 cpu-architecture

Why is rep movsb slow for overlapping forward memmove, and why does libc use it?

c++ performance x86 cpu-architecture memmove

Why are all IMUL µOPs dispatched to Port 1 only (on Haswell), even when multiple IMULs are executed in parallel?

assembly x86-64 cpu cpu-architecture intel

Does 8086 initiate a 1-byte code fetch when there's only 1 byte left in the prefetch queue?

x86 cpu-architecture x86-16

After enabling an interrupt via CSRRW in RISC-V, how many instructions may execute before trap entry?

cpu-architecture interrupt privileges riscv

Does the x86-64 pipeline stall on an indirect jump like JMP RAX?

assembly x86-64 intel cpu-architecture branch-prediction

Why are set cache associativity in modern day processors 8-way set associative?

caching intel cpu-architecture cpu-cache amd-processor

ARMv8.3 meaning of rcpc

arm cpu-architecture memory-barriers memory-model armv8

How to handle branch mispredictions that seem to depend on machine code position?

c++ performance benchmarking cpu-architecture branch-prediction

Do atomic operations require support from hardware?

c++ c cpu-architecture atomic lock-free

Why is the adressspace increased from 32 to 36 bits with PAE

paging cpu-architecture x86 page-tables

volatile increments with false sharing run slower in release than in debug when 2 threads are sharing the same physical core

c++ performance x86 cpu-architecture false-sharing

Detecting Aligned Memory requirement on target CPU

c cpu-architecture memory-alignment predefined-macro

Why doesn't bitwise NOT affect the ZF bit or any other FLAGS?

assembly x86 cpu-architecture eflags

What happens when the target CPU is "Any" and an assembly has two editions, x32 and x64?

.net visual-studio sqlite .net-assembly cpu-architecture

What is the difference between ABI and CPU architecture type?

android cpu-architecture abi

Cache line size

c++ performance caching benchmarking cpu-architecture
Older Entries »