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New posts in cpu-registers

Why do we use sub esp, 4 instead of push a register in assembly?

assembly optimization x86 stack cpu-registers

Why the %r0 of SPARC or MIPS, is always 0?

assembly mips cpu-architecture cpu-registers sparc

What does the gdb 'x' command do?

memory assembly gdb cpu-registers

How to force an unused memory read in C that won't be optimized away?

c embedded microcontroller volatile cpu-registers

What is the difference between "mov (%rax),%eax" and "mov %rax,%eax"?

assembly x86 x86-64 cpu-registers

Swap most significant byte and least significant byte in assembler

assembly x86 byte cpu-registers

Do the x86 segment registers have special meaning/usage on modern CPUs and OSes?

x86 history cpu-registers memory-segmentation

What is this pattern where the EBX register is used for memory access?

x86 reverse-engineering cpu-registers

push return values in stack frame

assembly stack cpu-registers machine-code stack-frame

How do you add CH to EAX in x86 assembly?

assembly x86 cpu-registers

Why are the cpu-registers in OllyDbg not sorted alphabetically?

assembly cpu-registers ollydbg

Are RAX, RBX, RCX, RDX, RSI, RDI, RBP, RSP, R8-R15 interchangable?

assembly x86-64 cpu-registers

What's wrong with register keyword in C++? [duplicate]

c++ cpu-registers c++17 storage-class-specifier

What’s the difference between eax ebx ecx in assembly

assembly x86 cpu-registers

How to read 2’s complement value from two registers into an int

c cpu-registers twos-complement

Counting registers/thread in Cuda kernel

cuda gpu cpu-registers hpc

is it possible to run 64 bit code in a machine with 32 bit processor?

c compilation 32-bit cpu-registers processor

Why are memory locations also called registers?

embedded cpu-registers

Why any modern x86 masks shift count to the 5 low bits in CL

assembly x86 cpu-architecture bit-shift cpu-registers

Why are x86 registers named the way they are?

assembly x86 naming history cpu-registers
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