Logo Questions Linux Laravel Mysql Ubuntu Git Menu
HTML CSS JAVASCRIPT SQL PYTHON PHP BOOTSTRAP JAVA JQUERY R React Kotlin
 

New posts in intel

Why does Hyper-threading get reported as supported on processors without it?

x86 intel hyperthreading cpuid

Skylake L2 cache enhanced by reducing associativity?

x86 cpu intel cpu-cache

The integer division algorithm of Intel's x86 processors

x86 hardware intel cpu-architecture integer-division

What does it implies to disable syscall in Intel SGX

kernel intel system-calls

Most efficient popcount on `__uint128_t`?

c gcc x86-64 intel micro-optimization

Do I get a performance penalty when mixing SIMD instructions and multithreading

multithreading performance intel simd

Reference material for uops?

x86 cpu intel cpu-architecture

What exactly happens when a skylake CPU mispredicts a branch?

x86 intel cpu-architecture branch-prediction speculative-execution

Which Intel microarchitecture introduced the ADC reg,0 single-uop special case?

performance assembly x86 intel micro-optimization

In which condition DCU prefetcher start prefetching?

x86 intel cpu-architecture cpu-cache prefetch

Why does switching from AT&T to Intel syntax make this tutorial segfault using GAS?

assembly x86 intel gnu-assembler att

Will fortran's 'matmul' make use of MKL if I include the library?

fortran intel lapack

default template class argument confuses g++?

c++ templates gcc g++ intel

Can I run Cuda or OpenCl on Intel processor graphics I7 (3rd or 4rd generation)

graphics opencl intel gpu

Is there any ARM equivalent of Intel IPP?

performance arm intel intel-ipp

Development PC: AMD vs Intel and 32-bit vs 64-bit

64-bit intel 32-bit amd-processor

Do 128bit cross lane operations in AVX512 give better performance?

performance x86 intel avx avx512

Global Descriptor Table

windows operating-system x86 intel

How can x86 bsr/bsf have fixed latency, not data dependent? Doesn't it loop over bits like the pseudocode shows?

performance assembly x86 intel cpu-architecture

C++ inline assembly (Intel compiler): LEA and MOV behaving differently in Windows and Linux

c++ c linux assembly intel
« Newer Entries Older Entries »