How to use SSE2 & PREFETCHh instructions at the same time?

Question

In the Intel IA-32 architecture manual volume 3A chapter 2, the CR4.OSFXSR is explained as following:

When set, enable the processor to execute SSE/SSE2/SSE3/SSSE3/SSE4 instructions, with the exception of the PAUSE,PREFETCHh, SFENCE, LFENCE, MFENCE,, MOVNTI, CLFLUSH, CRC32, and POPCNT.

The question is if I want to use SSE2 and PREFETCHh instructions at the same time, what should I do?

Answer 1

Yes, the wording could be clearer. What they meant to say is that CR4.OSFXSR bit only controls execution of instructions which work with SSE registers. The other instructions mentioned do not access SSE registers so they're always available (if implemented).

The following quote is a bit more clear:

If this flag is clear, [...] Also, the processor will generate an invalid opcode exception (#UD) if it attempts to execute any SSE/SSE2/SSE3 instruction, with the exception of PAUSE, PREFETCHh, SFENCE, LFENCE, MFENCE, MOVNTI, CLFLUSH, CRC32, and POPCNT.