I am using the following code to set the cr0 bit to disable cache. When I compile this
#include <stdio.h>
int main()
{
__asm__("pushl %eax\n\t"
"mov %cr0,%eax;\n\t"
"orl $(1 << 30),%eax;\n\t"
"mov %eax,%cr0;\n\t"
"wbinvd\n\t"
"popl %eax"
);
return 0;
}
I am getting error saying that the operands are invalid for mov.
Can anyone please point me to a good gcc x86-64 guide for doing these kinds of things? Also what exactly is wrong with the above code?
Ok, so finally I wrote the following kernel module. Am not sure it is right, since I don't observe the drastic slowdown which should accompany when you disable cache. But this compiles and inserts properly.
Any pointers will be helpful.
Thanks!
#include <linux/init.h>
#include <linux/module.h>
MODULE_LICENSE("Dual BSD/GPL");
static int hello_init(void)
{
printk(KERN_ALERT "Hello, world\n");
__asm__("push %rax\n\t"
"mov %cr0,%rax;\n\t"
"or $(1 << 30),%rax;\n\t"
"mov %rax,%cr0;\n\t"
"wbinvd\n\t"
"pop %rax"
);
return 0;
}
static void hello_exit(void)
{
printk(KERN_ALERT "Goodbye, cruel world\n");
__asm__("push %rax\n\t"
"mov %cr0,%rax;\n\t"
"and $~(1 << 30),%rax;\n\t"
"mov %rax,%cr0;\n\t"
"wbinvd\n\t"
"pop %rax"
);
}
module_init(hello_init);
module_exit(hello_exit);
You cannot do operations like this from user code and even running as root is user code.
You will need to make this into a driver module and load it using insmod.
I think you don't see the "drastic slowdown" because you have multiple cores, right? I made some experiments and it seems to me that setting CD in %cr0 only affects the processor your are running the module on.
Make sure that you run your code on all cores where you want to disable caching. You could, for example, create a /proc/cachedisable file where a read triggers your code. Then use
taskset -c cpu_number cat /proc/cachedisable
to disable the caches on CPU cpu_number. Do the same with /proc/cacheenable and you have everything you need. This works for me and there is no need to alter the MTRRs, which is pretty complicated. If you have multiple processors then you can disable caching on only one of them and perform your experiments on this cpu. Then the rest of the system remains usable.
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