Just curiosity about the standard sqrt()
from math.h on GCC works. I coded my own sqrt()
using Newton-Raphson to do it!
Let N be any number then the square root of N can be given by the formula: root = 0.5 * (X + (N / X)) where X is any guess which can be assumed to be N or 1. In the above formula, X is any assumed square root of N and root is the correct square root of N.
Create a variable (counter) i and take care of some base cases, i.e when the given number is 0 or 1. Run a loop until i*i <= n , where n is the given number. Increment i by 1. The floor of the square root of the number is i – 1.
yeah, I know fsqrt. But how the CPU does it? I can't debug hardware
Typical div/sqrt hardware in modern CPUs uses a power of 2 radix to calculate multiple result bits at once. e.g. http://www.imm.dtu.dk/~alna/pubs/ARITH20.pdf presents details of a design for a Radix-16 div/sqrt ALU, and compares it against the design in Penryn. (They claim lower latency and less power.) I looked at the pictures; looks like the general idea is to do something and feed a result back through a multiplier and adder iteratively, basically like long division. And I think similar to how you'd do bit-at-a-time division in software.
Intel Broadwell introduced a Radix-1024 div/sqrt unit. This discussion on RWT asks about changes between Penryn (Radix-16) and Broadwell. e.g. widening the SIMD vector dividers so 256-bit division was less slow vs. 128-bit, as well as increasing radix.
Maybe also see
But however the hardware works, IEEE requires sqrt
(and mul/div/add/sub) to give a correctly rounded result, i.e. error <= 0.5 ulp, so you don't need to know how it works, just the performance. These operations are special, other functions like log
and sin
do not have this requirement, and real library implementations usually aren't that accurate. (And x87 fsin
is definitely not that accurate for inputs near Pi/2 where catastrophic cancellation in range-reduction leads to potentially huge relative errors.)
See https://agner.org/optimize/ for x86 instruction tables including throughput and latency for scalar and SIMD sqrtsd
/ sqrtss
and their wider versions. I collected up the results in Floating point division vs floating point multiplication
For non-x86 hardware sqrt, you'd have to look at data published by other vendors, or results from people who have tested it.
Unlike most instructions, sqrt
performance is typically data-dependent. (Usually more significant bits or larger magnitude of the result takes longer).
sqrt
is defined by C, so most likely you have to look in glibc
.
You did not specify which architecture you are asking for, so I think it's safe to assume x86-64. If that's the case, they are defined in:
tl;dr they are simply implemented by calling the x86-64 square root instructions sqrts{sd}
:
Furthermore, and just for the sake of discussion, if you enable fast-math (something you probably should not do if you care about result precision), you will see that most compilers will actually inline the call and directly emit the sqrts{sd}
instructions:
https://godbolt.org/z/Wb4unC
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