I red the definition from http://en.wikipedia.org/wiki/NOP but I still need a simpler definition.
I stumbled across a code and I don't know exactly what it does:
switch (Something)
{
case this_one:
asm ("nop");
break;
case other_one:
asm ("nop");
break;
default:
asm ("nop");
break;
}
What Does No Operation (NOP) Mean? A no operation or “no-op” instruction in an assembly language is an instruction that does not implement any operation. IT pros or others might refer to this as a blank instruction or placeholder.
NOP is a mnemonic that stands for “No Operation”. This instruction does nothing during execution. Only it occupied 1-Byte of memory space and spends 4-Machine Cycles. NOP instruction can be used to create small-time delay in the execution of the code.
A NOP instruction takes one instruction cycle, which is 250 ns for Fosc of 16 MHz. One instruction cycle consists of four oscillator cycles (Q clocks); for an oscillator frequency of 16 MHz, this gives a nominal instruction execution rate of 4 MHz (1/4MHz = 250ns). Thanks for all replies! they are really very useful!
NOP instruction is the short form for 'No Operation' and is often useful to fine tune delays or create a handle for breakpoints.
nop
is an assembly instruction that does nothing--well as close to nothing as you can do and still execute a machine instruction, which means (probably) a REALLY tiny bit of time goes by (which can have limited value in certain realtime applications.
In this case, the statement asm("nop");
makes no semantic difference to the program. The only reason I can think that it might be present is to "force" the compiler to NOT collapse the code paths, making the machine structure of the switch statement visible if you look at the object code or disassemble the machine code or view it in a debugger.
Since nobody mentioned it, nop
can also be useful to "yield" during a critical section, i.e. allow other interrupts to occur so as to reduce interrupt latency caused by the critical section.
This is typically useful in embedded applications without operating systems where you often have to poll variables and/or status registers during a critical section.
On many RISC processors (ARM, AVR), the instruction immediately following interrupt unmasking will still be masked, so if you just put sei
/cli
close together, you won't allow any interrupt to occur.
Each nop
added between sei
and cli
allows one more interrupt to occur before the critical section resumes.
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